Scan design is a technique that allows tests to be easily generated for complex and even highly integrated digital circuits. Scan design is considered in its generic sense. A generic scan element is any storage device with functionally separate scan input, output, and clock; arbitrary interconnections of these elements form generic scan paths. Automatic test generation (ATG) is difficult for VLSI circuits due to their complexity. Substitution of software models for the scan elements within the circuit simplifies ATG. Such models are developed and their use is discussed.